In telecommunications technology, the frequency of useful signals which are to be transmitted and are originally in baseband is normally shifted in order to be transmitted over a channel. In this case, a radiofrequency carrier signal is usually modulated using the useful signal. Phase locked loops, for example, can be used in order to convert the frequency of a useful signal of this type to radiofrequency. A prerequisite for this is that the modulation signal has a constant envelope.
Transmission arrangements of this type are also referred to as modulation loops.
A phase locked loop of the generic type is indicated, for example, in FIG. 2 on page 2049 of the document by Michael H. Perrott et al. “A 27-mW CMOS Fractional-N Synthesizer Using Digital Compensation for 2.5-Mb/s GFSK Modulation”, IEEE Journal of Solid-State Circuits, Vol. 32, No. 12, December 1997.
In the case of phase locked loops (PLL) of this type, the phase detector is used to compare the phases of the oscillator signal whose frequency has been divided down and a reference signal. The oscillation frequency of the oscillator is changed, in a manner dependent on a phase and/or frequency deviation, in such a manner that the phase deviation disappears. The PLL is locked on in this state.
A loop filter is normally provided in order to couple the phase detector to the oscillator. From the point of view of control technology, this loop filter operates as a controller in the control loop and normally has integrating properties in order to maintain the stability of the control loop. Accordingly, the loop filter of a PLL is normally in the form of an I controller, a PI controller or a PID controller. In this case, the letter I represents the integrator in the controller.
A plurality of possible ways of introducing a modulation signal into a phase locked loop are known. Depending on the feeding-in point selected for the modulation signal, high-pass filter properties or low-pass filter properties result for the transfer function of the loop.
A high-pass filter transfer response of the loop results, for example, when the modulation signal is fed in at the input or at the output of the oscillator. It should be noted in this case that no technical implementation has hitherto yet been disclosed for feeding in a modulation signal at the output of the oscillator.
In contrast, a low-pass filter transfer response of the loop results when the modulation signal is fed in at one of the two inputs of the phase detector or at the output of the latter as well as when the modulation signal is fed in at the input of the frequency divider in the feedback path.
If one of the possible low-pass filter points in the control loop is used to feed in the modulation, the modulation signal is assessed using a low-pass filter function. This means that the modulation bandwidth is generally restricted to a value that is smaller than the loop bandwidth of the control loop. If, in contrast, a high-pass filter point is used, then the low frequencies of the modulation spectrum are attenuated in an unacceptable manner.
Chapter 10 “Transmitter Concepts, Integration and Design Trade-Offs”, pages 141 to 155, of the document by Markus Helfenstein and George S. Moschytz “Circuits and Systems for Wireless Communication”, Kluwer 2000, ISBN 0-7923-7722-2 specifies further possible ways of implementing modulation loops.
The modulators having a PLL which are cited have the disadvantage in common that a circuit node having low-pass filter properties is used to feed in the modulation signal. In addition, a very wide PLL bandwidth is needed to meet the high demands imposed on the quality of frequency conversion, as are called for in mobile radio standards, for example GSM.
The problems described could be solved by selecting a combination of a low-pass filter feeding-in point and a high-pass filter feeding-in point. Arrangements of this type are also referred to as two-point modulators.
However, the problem arises in this case that highly accurate adaptation is required between the low-pass filter modulation point (which is usually constructed using digital circuitry) at the frequency divider and the analog feeding-in node at the oscillator input. However, it is very complicated to effect this adaptation on account of manufacturing tolerances, temperature drifts etc. in the analog section.